Analogue electronics is a key part of system design today. Getting signals on and off a chip and processing those signals is a vital part of any chip designbut there are much wider opportunities as the strength of the technology is growing to address new markets in industrial and high volume consumer applications.
From analogue computers using transistors to integrate a signal to signal processing in the frequency domain to power controlanalogue designs are used throughout the industry and are vital to making a chip work efficiently.
As process technology advances and speeds increasethe majority of problems with
system-on-chip designs are to do with the analogue elements or the analogue challenges of signal integrity as the high speed signals interfere with each other.
But far from being a problemanalogue design is a tremendous opportunity.
CMOS technology
The latest market data from Databeans shows healthy 10percent compound growth in analogue and the other areas that use analogue technology such as communications.
Part of this is driven by the advancing CMOS process technologywhich at 0.25um and belowcan provide the performance that was only previously available with more exotic technologies such as gallium arsenide at a fraction of the cost and power consumption.
But it also does not scale as well as digital so there is no need to drive down the process technology curveand there are opportunities to use low cost 0.25um and 0.18um technology for innovative analogue designs.
Signal processing
This can be used for handling the analogue signals directly instead of trying to convert signals into digital for signal processing "if you dare to move away from the digital paradigm and think imaginatively" said Professor John Taylorhead of the centre for Advanced Sensor Technology at the UK’s University of Bath.
Techniques such as Viterbi convolutional coding with 6bit internal resolution can be implemented much more efficiently in the analogue domain.
A 100Mbit/s convolutional decoder in low cost 0.8um technology takes just 6000 transistors and 12mWcompared to 50000 transistors for a digital implementation and 60mW.
He is using this technology predominantly for biomedical applicationsintegrating the smalllow power processing into chips that are embedded in flesh for neuro-prostheses and connecting to neurons that are grown in the laboratory.
These have low frequency requirements from 1 to 10KHz and very small signals around 1uV and so need very low noise processing.
Single chip phones
At the same timeFPGA makers Altera and Xilinx have driven analogue into leading edge 65nm and 45nm CMOS processes at their foundriesTSMC and UMCto provide high speed 6Gbit/s transceivers on their chips. And companies such as BroadcomTexas InstrumentsNXP (now the joint venture with STMicroelectronics) are all doing single chip phones with analogue RF in CMOS in the move to ‘digitalRF’. And IP provider Chipidea (now parts of MIPS Technologies) is specialising in providing analogue IP on 65nm and 45nm for just these types of designs.
All of this is driving more capabilities and libraries in CMOS that open up opportunities for analogue designs.
One of those opportunities is high speed transcieverswhich Nanotech Semiconductor is delivering for both optical fibre and now lower cost plastic fibre.
"We are pushing gigabit data through plastic fibre at under 20mW" said Steve Cliffedirector of marketing at the company.
The company has taken its analogue CMOS transimpendance amplifier design from the glass fibre world and provided a family of 2.5Gbit/s and 10Gbit/s TIAs that offer at least 3-4dB more sensitivity at each data rate compared to the best existing solutionswhich are typically in expensive SiGe processes.
Building the devices on standard CMOS at a large foundry keeps the costs down for the consumer and industrial market.
Breakthrough
One of the most interesting things about this latest architectural breakthrough is that it builds upon the company’s earlier solutions to the challenges in the Plastic Optical Fiber (POF) world.
Not only does this new architecture offer both higher sensitivity and lower powerbut it is also extremely forgiving of its opto-electrical and mechanical environmentsomething the consumer- and automotive world takes for grantedbut that is relatively new to the glass fibre world.
This opens the technology up to other applicationssuch as moving video and data around equipment such as camcorders and mobile phones.
"Mobile phones is probably the biggest opportunity we have today" he said.
Analogue has also presented opportunities for startup Xintronixwhich is a Fastrack company in the region. CEO Nick Weiner is looking at high speed serial (SERES) interfaces for the next generation datacoms standards such as USB3PCI express 3Serial Attached SCSI and FireWire200 in the PC. "SERDES has often been the one thing that slows down the time to market of other productseven with lower data rates – that’s what happened with USB2" he said.
The next generation standards will need analogue techniques such as electronic dispersion compensation and will be separate chips initially for receive and transmitproviding a high volume opportunity as they go into digital cameras and digital camcorders and monitors.
But these will be integrated into chips in the PC eventually so any approach as to take into account providing IP as well and how that gets integrated.
"ICs have a huge time to get to revenuebut IP adds another entire loop before the end customer sells the chips. This makes it extremely difficult to start a business selling IP" he said.
nother analogue companyPhyworksis targeting 10Gbit/s data rates for its devices with a serial retiming receiver with Electronic Dispersion Compensation (EDC) for 10Gbit/s Ethernet.
Manufactured on a CMOS processthis second-generation EDC chip is a more powerful equaliseris smaller in size than alternatives and is easier to integrate with other devices to upgrade X2 and XFP optical modules and SFP+ based line cards to true 10Gbit/s operation.
The US$25 analogue chip combines clock data recovery (CDR) and a fully automatic EDC circuitremoving the need for complex microcontroller support and thereby substantially reduce product development time.
Another approach to analogue design is also emerging through the Cellular Neural Network chip. This technologyoriginally out of the University of California at Berkeleycombines analogue amplifiers in a large array to handle analogue computationsparticularly image analysis. It is now being licensed to designers to use.
"I’d love to license this to some startups and to universities to develop" said Bill Nelson of CNNSuperchip.
Analogue design provides a wide range of oppurtunitiesfrom low power and small sizeto high performanceto high volume and low cost. CMOS technology now provides enough performance and the low cost base to take analogue into a wide range of consumer applicationsfrom mobile phones to PCs as wellas technology that is literally embedded into everyday life.
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