Microsemi is putting more focus on its FPGA devices several years after it acquired Actel with a new tool and new family of devices.
It has launched a new design tool called System Builder for its ARM-based SmartFusion2 system on chip as part of its Libero SoC Design Environment version 11.0. At the same time it has launched a new version of its Igloo FPGA targeting smaller designs just using FPGA fabric.
“The System Builder tool significantly simplifies the design process for Microsemi’s SmartFusion2 SoC FPGAs in embedded system applications,” said Jim Davis, vice president of software and systems engineering at Microsemi. “As these devices have grown in complexity the architecture specification stage of the design has become increasingly error-prone. With System Builder the designer can quickly and easily define the desired system architecture via a high-level step-by-step process.”
The output from System Builder is automatically generated and correct-by-construction, eliminating the errors that are created when the architecture is specified ‘by hand’ as in more traditional tool flows and shortening the design cycle time for complex SoC FPGAs.
SmartFusion2 integrates inherently reliable flash-based FPGA fabric, a 166MHz ARM Cortex-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM and industry-required high performance communication interfaces, all on a single chip.
Software-orientated engineers can also easily create an embedded architecture and begin code development all on their own. This simplifies the adoption of SmartFusion2 devices and provides a much broader set of design engineers with access to SoC FPGA technology.
The enhanced System Builder flow also enables Microsemi to easily support more customers with its internal design services team that offers digital or mixed signal design for custom functional blocks, Soft IP, firmware development and even complete designs to end customers.
System Builder users are guided step-by-step through each of the main SoC FPGA architecture blocks. The design process uses a high-level graphical interface that reacts to previous architecture selections and guides the user through the process of selecting options and configuring only the required embedded system blocks.
The resulting system specification is automatically generated and correct–by-construction. It includes both the configuration and interconnects of the ARM processor and its related peripherals as well as other IP blocks implemented in the FPGA fabric.
System Builder can also configure a growing set of IP blocks for high-performance interfaces including DDR2/DDR3/LPDDR memory controllers, and serial interfaces using 5Gbps SERDES for PCIe, XAUI (10 GbE) and SGMII.
Additional fabric-based parameterised IP functions available within System Builder include I2C, SPI, Timers, UARTs and PWM blocks. This proven IP functions can be quickly and easily used to create application-specific SoCs, reducing time-to-market for the full range of industrial, communications, aviation and defence systems.
The new non-volatile flash-based IGLOO2 family of FPGAs have the highest number of mainstream FPGA features including general purpose input/outputs (GPIOs), 5G SERDES interfaces, and PCI Express endpoints of any similar device on the market today, and feature the industry’s only high-performance memory subsystem.
When compared to other 5G SERDES-based FPGAs under 150K logic elements (LEs), IGLOO2’s high level of integration provides the lowest total system cost versus competitive FPGAs while improving reliability, significantly reducing power and systematically protecting valuable customers’ design IPs.
The IGLOO2 FPGA family requires only two power supplies, versus three for competitive devices. Additionally, the non-volatile configuration of IGLOO2 eliminates the requirement for external flash memory, providing the system architect with a higher level of system integration, performance and reliability.
Microsemi has already engaged with lead customers who plan to use IGLOO2 in a broad range of products including industrial controllers, Ethernet switches, FADEC engine controllers, missile systems, and other applications.
“Our new IGLOO2 FPGAs feature an unparalleled level of functionality, which allows us to address a broader range of opportunities as well as expand our presence in key vertical markets where Microsemi has a strong footprint,” said Esam Elashmawi, vice president and general manager of Microsemi’s SoC product group. “With our comprehensive product portfolio, Microsemi is the only semiconductor company to offer programmable solutions, analogue, digital and mixed-signal ICs under one umbrella. This unique strategic advantage allows us to provide our customers with system-level solutions that lower bill-of-material costs and power consumption in a wide range of products.
“The IGLOO2 FPGA family follows the successful launch of our SmartFusion2 SoC FPGAs last year, which are shipping to customers now,” said Elashmawi. “The launch of two major FPGA families within a year exemplifies Microsemi’s continued commitment to invest in industry leading advanced SoC and FPGA products.”
Microsemi’s IGLOO2 FPGAs address industry needs for mainstream FPGA features by providing a LUT-based fabric, 5G transceivers, high-speed GPIO, block RAM and DSP blocks in a differentiated, cost- and power-optimized architecture. The new IGLOO2 FPGA architecture offers up to five times more logic density and three times more fabric performance than the previous generation IGLOO family.
For cost-optimised FPGAs below 150K logic elements, IGLOO2 provides the high level of I/O and SERDES integration—which is necessary for I/O expansion, bridging, system management and co-processing— allowing customers to use smaller devices for I/O expansion and bridging solutions. This, coupled with the need for only two power supplies and no external configuration devices, reduces overall system cost and board complexity.
For the vast number of applications in the communications, industrial, defence and aviation markets that require highly integrated premium features for I/O expansion, bridging and co-processing at a lower cost, IGLOO2 provides a best-in-class solution.
IGLOO2’s FPGA features are complemented by a unique built-in high-performance memory subsystem (HPMS) that embeds common user functions such as the industry’s largest monolithic embedded SRAM memory blocks. These memories provide fast, predictable low latency to time critical embedded applications such as video, embedded graphics functions and real time Ethernet.
Included in the HPMS is up to 512Kbytes of flash memory which allows users to store pertinent system data such as Ethernet MAC IDs, user keys, system configuration and system personalization data. This feature also enables secure boot functions for industry leading processors by storing secondary boot loaders securely on-chip.
In addition, the HPMS integrates two DMA controllers and a two-port memory cache (DDR bridges) to efficiently move data within and in-and-out of IGLOO2 to external DDR3 memories for these embedded time critical applications.
IGLOO2 Family Designers can use the Libero toolset for designing IGLOO2 FPGAs. This includes FPGA development tools from leading EDA vendors such as Mentor Graphics and Synopsys. These tools, combined with tools developed by Microsemi, allow customers to quickly and easily manage their Microsemi FPGA designs. An intuitive user interface and push button design flow guide users through the flow while organising design files and seamlessly managing exchanges between the various tools.
The M2GL050 is shipping in volume production now with subsequent device configurations rolling out throughout 2013 and early 2014. IGLOO2 FPGAs will be available in extended temperature offerings of up to 125 degrees centigrade temperature junction.
The low-cost IGLOO2 Evaluation Kit will be available in August 2013 and the IGLOO2 devices start at less than $7 for high volume orders.
For more information, visit www.microsemi.com/igloo2-fpga