The new Intepro SemTest automated test system is a solution for reliability and extended lifetime testing of power semiconductors, including IGBT, MOSFET, SCR, Diode and Bipolar parts and modules. This fully integrated solution meets the requirements of JEDEC standards and may be used for product development characterisation. SemTest is comprised of a test system, thermal oven and test software with optional chiller and cold plates.
The Intepro SemTest system performs a combination of thermal and electrical cycles to verify new products, processes and materials including (SiC) Silicon Carbide based semiconductors or devices designed to meet RoHS requirements. SemTest is designed to accelerate any failure mechanisms in the device in order to determine its life and functional operating limits.
Key features of SemTest include power cycles to provide thermal and electrical stressing of device under test (DUT), highly accelerated life testing of DUTs, trend monitoring with user defined warning and control limits, junction temperature measurement, rapid DUT temperature cycling and ambient temperature profiling, detection of nascent failures with automated alert mechanism and DUT isolated control.
Typical applications for the Intepro SemTest include, design engineering verification, design characterisation and manufacturing validation and to simulate harsh electrical and environmental conditions demanded of the automotive, aerospace, defence industries and transportation.
Operational test modes include, linear, switched, saturated, voltage breakdown and avalanche. Typical DUT parameters measured include junction/DIE temperature, DUT terminal voltage, DUT current and power, ambient power and temperature and elapsed test times and test cycles.
SemTest HT80 consists of a temperature chamber rated at 60 to 225°C, ±2°C and associated hardware rack that provides the test hardware
The SemTest HT80 consists of a temperature chamber rated at 60 to 225°C, ±2°C and associated hardware rack that provides the test hardware. Internal racks are included to mount the DUT carrier cards and internal temperature is maintained with LN2 cooling. The equipment rack consists of a Card Cage Assembly installed in the rear wall of the Temperature Chamber. The rear wall contains 10 slots that align with the FSD Module connectors. The combination of the Card Cage Assembly and Temperature Chamber will make up a Chamber Assembly. The Chamber Assembly requires support from a System Cabinet that houses the system power supplies, measurement electronics, PC Controller, and the PowerStar control and operational software.
The heart of the system is the Force/Sense DUT (FSD) Module. The FSD module is a 6U euro-card format that has a front panel control/monitor interface and a rear connector where the DUT Carrier Card will mount. Each FSD module controls up to 8 DUT Test Cells. The FSD Module provides local force, sense and control signals for HTRB and HTGB testing. Each DUT can be individually controlled by the FSD Module. As each FSD Module houses 8 DUTs, a total of 10 FSD Modules will be required for a single SemTest HT80 system. The system may be expanded in blocks of 80 DUT to 160, 240, 320, etc.
The system continuously monitors the current flow in each DUT. If at any time the current exceeds the set limit, the supply voltage to this the device is turned off to prevent damage. All other DUTs continue to be tested.
The system also has the ability to reverse the polarity of the high voltage supply automatically as part of a test routine without having to turn the tester off and change jump leads.
Tests and measurements include voltage up to 1200V, current up to 1000A, power up to 20kW (total dissipated power), a range of DUT Voltages and a temperature range from -40°C to 180°. System test configuration is programmed at a PC using a user friendly GUI (Graphical User Interface).
Local control of the test is performed by distributed local controllers. A DUT interface card is used to provide high power isolated control for particular DUT types. Test results are written to an SQL Database for analysis and traceability.
DUT failures are detected by real time DUT monitoring circuitry, which compares measured values to warning and control limits based on DUT history. When a DUT starts to fail, all electrical stresses are removed within 30msec. This prevents further catastrophic damage to the DUT and allows the user to remove it for detailed failure mode analysis.