Dow Corning has established a higher industry standard for silicon carbide (SiC) crystal quality by introducing a product grading structure that specifies ground-breaking new tolerances on killer device defects, such as micropipe dislocations (MPD), threading screw dislocations (TSD) and basal plane dislocations (BPD).
This new grading structure aims to optimise the range, performance and cost of next-generation power electronic device designs fabricated on Dow Corning’s high-quality Prime Grade portfolio of 100mm SiC wafers, which the company now offers in three new tiers of manufacturing-quality substrates labelled Prime Standard, Prime Select and Prime Ultra.
Each successive Prime Grade wafer tier under Dow Corning’s new product grading structure offers tighter tolerances for defect density and other critical performance properties that allow customers to precisely balance wafer quality and price, depending on the demands of their specific device applications.
While many SiC substrate manufacturers promise low micropipe densities, Dow Corning is the first to specify low tolerances of other killer defects, such as TSD and BPD. Such defects reduce device yields, and inhibit the cost-efficient manufacture of large-area, next-generation power electronic devices with higher current ratings.
All 100mm Prime Grade SiC wafers from Dow Corning offer mechanical characteristics to ensure compatibility with existing and developing device fabrication processes. The Prime Grade portfolio includes:
* Prime Standard SiC wafers that guarantee MPD of 0.5 cm-2 or less, offering an attractive option for balancing performance and cost when designing simpler SiC power electronic components, such as Schottky or Junction Barrier Schottky diodes, with low to medium current ratings
* Prime Select SiC wafers that deliver more stringent tolerances for MPD (= 0.2 cm-2) and BPD (= 800 cm-2), making them suitable for more demanding SiC devices like pin diodes or switches.
* Prime Ultra SiC wafers enable design of high-power devices that require the highest crystal quality. SiC substrates in this tier deliver extremely low MPD (= 0.1cm-2), BPD (= 500cm-2), TSD (= 300cm-2) and a tightened wafer resistivity distribution for the design of today’s most advanced SiC power electronic devices.
These include next-generation switching devices like metal-oxide-semiconductor field-effect transistors (MOSFETs), junction gate field-effect transistors (JFETs), insulated-gate bipolar transistors (IGBTs) and bipolar junction transistors (BJTs) or pin diodes. In addition, the superior substrate quality in this tier can benefit high-voltage (3.3 kV and higher) and high-current device designs.
For more information, visit www.dowcorning.com