Mentor Graphics has launched the third generation of its emulation platform, increasing throughput by a factor of five and potentially emulating the largest system-on-chip designs with up to 15 billion gates.
The Veloce StratoM high-capacity emulator and Veloce Strato OS enterprise-level operating system combine to link multiple emulators to data centre processing.
The StratoM, which is currently on site at major customers, reaches 2.5 billion gates capacity when fully loaded with 64 Advanced Verification Boards (AVBs) and consumes up to 50KW (22.7 W/Mgate) of power. Multiple systems can be linked together using the Strato operating system to reach 15 bn gates.
Other performance improvements include: total throughput up to 5X (fastest compile-runtime-debug sequence), time to visibility up to 10X (fastest time to debug), compilation time up to 3X (with 100% success rate) and co-model bandwidth up to 3X (fastest virtual co-model solution available).
The enterprise-level operating system forms the foundation for a common infrastructure for all Veloce Strato hardware and software applications.
The OS is hardware-platform independent so that Veloce Apps and Protocol Solutions are interchangeable between hardware platforms, supporting the Veloce Power App, Veloce DFT (design or test) App and Protocol Solutions such as Veloce VirtuaLAB (virtual peripherals), iSolve for physical peripherals and soft models. The OS is modular to serve as a common front-end for a full range of solutions from verification through prototyping to validation.
“We are excited to announce the new Veloce Strato Platform, and equally delighted that Veloce StratoM is already in the hands of our largest customers,” said Eric Selosse, vice president and general manager of the Mentor Emulation Division. “Early feedback is very positive, and there is clear indication that the Veloce Strato platform defines a roadmap to 15BG that is needed for the emulation market for the next five years and beyond.”
Veloce is a core technology for Mentor’s Enterprise Verification Platform (EVP) that boosts productivity in ASIC and SoC functional verification by combining advanced verification technologies.
These include Questa verification and Visualizer debug tools alongside Veloce, creating a globally accessible, high-performance datacentre resource that supports project teams around the world.
Mentor is currently being acquired by Siemens to become part of the Product Lifecycle Management (PLM) software business of Siemens Digital Factory (DF) Division.