Having pioneered reprogrammable hardware, Xilinx is the world's largest maker of field programmable gate arrays. Willem P aWim' Roelandts has served as President and CEO since January 1996, and in August 2003 assumed the position of Chairman of the Board.

Under Roelandts' leadership, Xilinx has doubled its revenue to over US$1billion, significantly expanding its business globally and diversifying into higher volume consumer markets including the automotive market through the low cost Spartan family of devices.
Market research firm Gartner Dataquest ranks Xilinx as the fourth largest supplier of custom logic chips in the world and the number one supplier of programmable logic chips, one of the fastest growing segments of the overall semiconductor industry. In 2004 it launched its latest family of high end devices, the Virtex-4 family, targetting high end applications.
Born and trained in Belgium, Roelandts joined Xilinx after 30 years at Hewlett-Packard. In his most recent position, he served as senior vice-president and was responsible for all aspects of HP's then US$6billion worldwide computer systems business.

EEE: How do you see the outlook for 2005 and beyond -- are we out of the downturn? Where are the next key applications coming from?

WR: This is a challenging environment in which to forecast. What started as a short-term inventory correction could possibly lead to a world-wide economic slow-down if oil prices remain over US$50per barrel for an extended period of time. Despite this, we remain optimistic as we are in an outstanding product position at the moment. We have also defined two additional key programmable technologies on which we will focus -- digital signal processing (DSP) and embedded processing and we see these as huge growth opportunities for programmable logic.

EEE: Xilinx has moved into automotive. Why would designers be interested in FPGAs?

WR: Electronic systems have become more prevalent and are used by car manufacturers as key differentiates and value-adds between brands and models. At the same time the requirements for cost reduction and exhaustive testing means that the traditional advantages of flexibility and time-to-market are key. Automotive customers are looking to build electronic platforms that can be re-used between models while adding features as they move up the model range, for example, from a BMW5 to a BMW7 series. One of the advantages of an FPGA platform over microcontrollers is the basic platform can be extensively tested and then features can be added in parallel without the need for complete re-testing of the platform.

EEE: With design starts still averaging 100000 gates, do we need bigger FPGAs? Wouldn't it drive the FPGA business better to focus on reducing the costs of mid-range densities to get these into as many designs as possible and really compete with microcontrollers in embedded designs?

WR: Since FPGAs are adopted by a very broad range of customers for a multitude of applications, we find strong demand across the whole spectrum of densities and volume. There will always be customers who use every gate and every MHz we can produce for SoC applications and for those customers we will continue to produce the industry's largest, highest performance FPGAs. For those who do not need the highest density or performance, we have a completely separate division focused on building the most cost-effective FPGAs for our industry. Our Spartan-3 FPGAs make use of the most cost-optimised process technologies and architectures, together with efficient manufacturing techniques to offer the lowest cost solutions for this sweet-spot. We are even able to further cost-reduce our FPGAs to prices below those of Structured ASICs using our EasyPath solution. With Spartan-3 and EasyPath, combined with our embedded processor solutions, both hard and soft, we are winning against microcontrollers in applications that can benefit from multiple processors, integration of existing programmable logic, co-processing and IO expansion.

EEE: How close are we to the fabled million gates for US$5? What applications are enabled at that point? Costs for the EasyPath FPGA conversion have come down dramatically recently. Why is that, and how can FPGAs compete with structured ASICs?

WR: Thanks to the use of an advanced 90nm process technology, 300mm wafers and a dedicated low-cost architecture, Xilinx has been able to bring down the cost of its Spartan-3 family of FPGAs to a competing level with ASICs in all end markets including high volume consumer applications. Such applications would include personal video recorders, media servers, flat panel displays, video and still cameras, MP3 players, DVD and gaming systems. FPGAs can play a key role in the convergence of certain applications like set-top boxes with recording and wireless communication capabilities to enable any home display device to receive media. The Apple iPOD is a good example of convergence, where latest products provide image as well as music storage capability. In new and converging applications, there are different standards and interfaces for which ASIC or ASSP suppliers have no ready solution.
For those customers who are prepared to lock down their designs in return for even lower unit costs, an EasyPath version of the 1.5million gate Spartan-3 FPGA can be bought for just US$12.95 in volume, almost half the price of Structured ASICs.

EEE: Xilinx has moved away from the economies of scale of using one chip architecture per product family, and now has three significantly different variants in Virtex4. Why have you made this move and doesn't it add costs through increasingly complex product management and lower volumes?

WR: Over the last three years Xilinx FPGAs have been following an ever increasing trend of being designed into applications which were traditionally serviced by ASSPs and ASICs. To accelerate this trend FPGAs require a greater variety of features integrated into the devices, while still providing the flexibly of programmable logic. To maximise the number of applications where the use of these features becomes cost effective, it is essential to offer a mixture of ratios of these features. All Virtex 4 members have the same architecture; it is just the ratio between the different blocks that is changing in order to come closer to the actual needs of the designers. Virtex-4 will be used by a new breed of designers for designs that used alternative solutions in the past.

EEE: Xilinx is working at the forefront of reconfigurable technology with several companies and yet it is limited to a few niche areas. How close are we to really using the configurability and re-configuration of FPGAs in mass market embedded systems? Why is that?

WR: In complete reconfigurability, the whole bitstream is replaced while the FPGA is inactive. One example of this is using the FPGA to bring up the board and run basic tests on it before reconfiguring itself to perform its normal role in the system. This feature can be used with EasyPath FPGAs if the double-bitstream option is taken (using two different bitstreams to re-program the device). In partial reconfigurability, only discrete sections of the FPGA are reconfigured and this may be done while the rest of the FPGA is active.
One new application for this uses the facility to reconfigure the multi-gigabit serial transceivers (MGTs) in our Virtex-4 devices to implement adaptive equalisation. Transmit pre-emphasis and receive equalisation are programmable features of these MGTs. In adaptive equalisation the system adjusts the optimum equalisation for maximum bandwidth, depending on the environment and interference it experiences. It does this by monitoring signal quality and selecting the optimum configuration parameters from a number of options stored in Block RAM. Another application of partial reconfigurability, which we recently announced is Software Defined Radio. Although optional complete reconfiguration is now a mainstream design principle, partial reconfiguration is still an untapped opportunity for our customers.

Willem P aWim' Roelandts is based in Santa Clara, CA, USA. www.xilinx.com