Phone makers are starting to look at other ways of adding multimedia functions to their products rather than developing a 3G system from scratch. Adding a multimedia coprocessor to an existing design to ease the transition to data-orientated services is becoming increasingly common as the timescales for 3G get longer and longer. Nick Flaherty reports.

The approach to adding multimedia functions to their products taken by companies such as Alphamosaic, ST Microelectronics and MediaQ is to develop a low power multimedia processor to sit as part of the handset platform.
The Alphamosaic approach with its VideoCore architecture is to use a standard 32bit RISC processor with 16 programmable 8/16-bit vector acceleration units. Coupled with a 64x64 pixel 2D register file and 8Mbits of on chip SRAM for video and program memory and running the core at up to 125MHz gives a processing throughput equivalent to six billion operations per second. The company has also developed middleware to allow the VC01 to connect to baseband designs for applications such as video email, camcorder video recording quality, 3D graphics-intensive games, two-way video conversations and high quality stills camera. This middleware includes a file service, display manager and general command service that handles host requests and data services.
"We demand high quality video, hifi audio and exciting games in our own homes. Now, for the first time, manufacturers and designers using VideoCore will be able to deliver all this to mobile phones," said Dr Jalal Bagherli, CEO of Alphamosaic.
Similarly ST Microelectronics has developed Nomadik, a family of multimedia processors that can handle Based around a 350MHz ARM926 core processor, the Nomadik combines a video accelerator and an audio accelerator as well as interfaces to high speed DRAM and flash memory.
This has been designed to work with the latest version of the OMAP chipset developed by Texas Instruments. OMAP2.5 also uses the ARM9 core with peripherals for GPRS mobile phones.
The aim with Nomadik has been to have general purpose peripherals that can be programmed for a wide range of applications.
The architecture is based on a multi-layer, AMBA crossbar interconnect that maximizes the data bandwidth between the CPU, multimedia accelerators, system memory and peripherals, using ARM's PrimXsys development platform.
The programmable audio smart-accelerator implements the main industry-standard digital audio encoders and decoders including MP3, MPEG2-Layer II, MPEG2/4-AAC and Dolby Digital. ST claims to have industry's lowest power consumption running H.263 and MPEG4 CODECs by using the programmable video smart accelerator, and the new H26L (H.264) standard will also be available in future Nomadik implementations.
Nomadik supports up to CIF video encoding with 48KB of on-chip SRAM, used for video frame grabbing and search window storage, while external memory is used for residual video processing. This boosts performance by reducing the memory latency and reduces power consumption (I/O & bus) and die size.
The chip is built on 0.13µm today and will move to 90nm next year, he says when it will reach a core frequency of 500MHz.
Power consumption is reduced by using clock gating throughout the design to switch off elements that are not being used, and by scaling the clock frequency down to the amount of processing that is actually required, and, of course, being a separate chip, it can be switched off when not needed. Other members of the family will include hardware for encryption.
California-based MediaQ has been following a similar strategy for the last three years, already winning slots in PDA and phone designs. Its 2D graphics acceleration engine is being used in PDAs from Sony, Palm and Casio, as well as in certain phones from Motorola and Sanyo. On the back of that key systems expertise and those customers, it has now developed a platform for a family of multimedia acceleration devices.
The Katana family is based around the ARM922 core with a Java engine licensed from Nazomi, rather than using the Jazelle Java instruction extensions that have since been developed by ARM. But the key to the SoC design is the large amount of embedded SRAM in the chip. The accelerator blocks around the 922 core have direct access to this eSRAM as well as their own direct memory access (DMA) engines to handle data transfers without requiring the CPU to be involved. This is one of the reasons for the high levels of system performance, says Venkat Puntambekar, Product Marketing Director at MediaQ.
The architecture also takes this need for applications performance into account, as the memory interface in the SRAM is designed so that it links to only one block at a time. This decision was made on the basis that at the moment only one function is needed at a time. If the camera is working, the Java acceleration and 2D graphics acceleration is not needed and vice versa. This also ties into the power management architecture by allowing those other blocks to be shut down.
The first part in the family, the MQ9000, has 320Kbytes of embedded SRAM with a 64bit 2D graphics engine, Java accelerator and MPEG4 decoding, as well as an interface to today's CCIR656 CIF resolution camera modules. Later in the year comes the MQ9100 with 480Kbits of SRAM and is aimed at VGA resolution cameras in phones and PDAs, along with all the other accelerator blocks.
But it also adds support for two QVGA LCD displays for clamshell phones with a screen on the outside as well as the main user screen. This would allow users to take photographs with the phone without having to open it, says Puntambekar. Then comes the MQ9150 for megapixel camera modules up to 1.3Mpixels with the embedded JPEG engine and all the other blocks. All the devices support playback of video in the MPEG4 format, and later versions will include hardware to accelerate coding and decoding of MPEG4 streams for videophone applications.
While MPEG4 codecs can be implemented in the processor, this is very power hungry, says Puntambekar. MediaQ has focussed on power consumption in the design, using UMC's 0.15µm low power process an using power management algorithms to switch off the various block in the chip when they are not being used.
As these approaches become successful they will start to be integrated into the chipsets from the major suppliers such as TI as process technologies allow more integration and lower power. However, leakage current is becoming more of an issue in power consumption and limiting the amount of integration that can be achieved.
So for the meantime, the discrete chip solution for multimedia is a fast way of adding capabilities to existing, proven designs and that is a key advantage. The ability to reduce costs for the cash-strapped network providers may also prove to be a key capability and reason for using such devices that will see them used for longer than even the suppliers currently expect.