MirrorBit is fundamentally different and more advanced than conventional multi-level cell (MLC) and single-level cell (SLC) floating gate technology.

The MirrorBit cell doubles the intrinsic density of a Flash memory array by storing two physically distinct bits on opposite sides of a memory cell. Each bit within a cell serves as a binary unit of data (eg, either 1or0) that is mapped directly to the memory array.

Reading or programming one side of a memory cell occurs independently of whatever data is stored on the opposite side of the cell. As a result, MirrorBit technology delivers higher read and write performance for wireless and embedded markets.

Spansion is also making moves into the NAND flash area with a nitride-based technology.

MirrorBit ORNAND2 will use a SONOS-like memory cell connected in a NAND memory array at 45nm, giving both fast write performance with high packing density. Manufacturing on 300mm wafers gives the cost structure necessary for such consumer-oriented products.

These will primarily target data storage applications in the integrated Flash memory markets and products are expected to be available in early 2009.

“Spansion is the only company to have successfully ramped charge trapping storage technology in high volume,” said Dr. Lou Parrillo, executive vice president, research and development, Spansion Inc. “With our proprietary leading-edge MirrorBit technology, 300mm wafer capability and planned NAND-equivalent performance, we can further expand our product roadmap and accelerate our MirrorBit technology momentum.”