Today’s computing systems require very high off-chip communications bandwidth, and multi-Gb/s serial links for chip-to-chip interconnect are now ubiquitous. As system designers face hard power limits due to thermal or battery-life requirements, optimising power versus performance becomes more critical. This allows either higher speeds for the same power, or, as in this case, a move to providing high speed serial links in battery powered systems.

As more data needs to be moved around the system to handle applications such as video, parallel busses struggle. Multiple tracks face signal integrity and interference problems and reach a practical limit, so high speed serial has been the way forward. Rambus started working on high speed serial technology more than 10 years ago for memory systems, and now used in Sony’s PlayStation3 games console, and is moving into all kinds of equipment designs, from high bandwidth network telecoms systems down to mobile phones. The struggle is to get the power down for portable, battery powered devices.

Transceivers have been demonstrated at about 20mW/Gb/s and chip-to-chip links have more recently achieved power efficiencies near 10mW/Gb/s, but Rambus has developed a 6.25Gb/s transceiver test chip in 90nm dual gate (1.0V, 2.5V) CMOS that dissipates 2.2mW/Gb/s. This test chip (Fig.1) includes four transceivers with shared LC-PLL, a support block and an interface to an external controller. This technology is the foundation of a series of products at Rambus called Flex-IO for both parallel and high speed serial products, both for standards such as PCI-Express and for its own proprietary protocols

In the lab, Rambus used this test chip to transfer more than 3600Terabits of data, the equivalent of the contents of nearly 100000 standard-format DVDs, using just two standard AA batteries.

“Rambus invests in technologies that provide the highest interface performance for a range of power envelopes,” said Kevin Donnelly, senior vice president of Engineering at Rambus. “This initiative further illustrates the innovative work our team is doing to help reduce power consumption without sacrificing performance.”

Rambus took a systems-level approach to reducing power in a multi-Gbps transceiver architecture. After analysing the breakdown of power distribution in existing transceivers, Rambus developed a test chip in a 90nm foundry process technology that operates at 6.25Gbps over a channel with -15dB of loss.

The power reduction is achieved using a shared PLL for reference-clock multiplication, a resonant

clock-distribution network, a low-swing voltage-mode transmitter, a low-power phase rotator for the receiver clocks, and software-based CDR and adaptive equalisation.

Fig.2 is a block diagram of the transmitter. The output stage is a low-swing voltage-mode differential driver, and the output swing is set by a locally regulated power supply Vs, adjustable to provide an output signal swing of 50 to 300mVpp-diff. A large internal bypass capacitor on the Vs supply completes the differential termination path.

The measured power consumption per transceiver is 13.8mW under nominal conditions. A transmitter consumes 4.9mW, a receiver consumes 8.0mW, and the shared LC-PLL and clock distribution network together consume 3.6mW (0.9mW per transceiver).

A single transceiver occupies 0.307mm2, 25percent of which is the bypass capacitor. The LC-PLL is 0.228mm2, of which 6percent is VDD bypass capacitor. Area calculations include wirebond pads, and the design uses standard-Vt 1V devices, 2.5V thickox standard and native devices, and the NMOS accumulation-mode varactor.

In a similar move, Fairchild Semiconductor has developed a serialiser/deserialiser for mobile phones and portable systems with integrated multi-mega

pixel-resolution CMOS and CCD image sensors (Fig.3).

Using its proprietary CTL I/O for serialising up to

12-bits at speeds up to 40MHz, the FIN212AC (Fig.4) can be configured as a serialiser or deserialiser and is implemented in pairs. The patented CTL technology operates well in noisy RF environments by eliminating additional shielding required by similar high-speed signals while offering the industry’s lowest EMI(-110dBM). The FIN212AC is especially beneficial when used in portable electronics with clamshell and slider form factors where minimising the number of signals across a hinge reduces board space and improves reliability.

The chip has selectable LVCMOS edge rates and pulse width to increase design flexibility while minimising EMI. This allows the designer to tune the FIN212AC to a particular frequency range and enable implementations for both RGB and MicroController interfaces without requiring software modifications.

Although primarily targeting 8–12bit camera interfaces in cell phones, the FIN212AC is also aimed at applications with similar parallel interfaces up to 12-bits such laptops with integrated web cams, VOIP phones and security cameras. With a power-down mode consuming just 0.1µA when not transmitting data, the FIN212AC is an extremely low power solution for conserving battery life in portable applications. Additionally, the device's ultra-small BGA and MLP packages can be mounted on a PCB or directly on the flex, providing further board-space savings and design flexibility.

Chris Ferland, marketing manager for Fairchild’s interface products, said: “By using the FAN212AC specifically that was developed for the wide range of image sensors commonly used today, designers of cell phones and other portable electronics can now serialise both their display and camera signals. This is important since in some cases the camera design may be a more critical concern due to the EMI associated with the higher speeds of the camera interface.”

Devices such as the Fairchild serialiser show how serial links are penetrating mobile applications to handle video, and the high speed technology developed by Rambus will further allow the system designer the flexibility to choose speed or battery life in the equipment.