Dow Corning, a leader in silicon and wide-bandgap semiconductor technology, has established a higher industry standard for silicon carbide (SiC) crystal quality by introducing a product grading structure that specifies groundbreaking new tolerances on killer device defects, such as micropipe dislocations (MPD), threading screw dislocations (TSD) and basal plane dislocations (BPD). This new grading structure aims to optimise the range, performance and cost of next-generation power electronic device designs fabricated on Dow Corning’s high-quality Prime Grade portfolio of 100-mm SiC wafers, which the company now offers in three new tiers of manufacturing-quality substrates labelled Prime Standard, Prime Select and Prime Ultra.
“As a global technology leader in advanced silicon carbide materials, Dow Corning recognises that wide-bandgap semiconductor technology must deliver much more than high quality alone – it must deliver exceptional overall value,” said Gregg Zank, chief technology officer. “Our new SiC wafer grading structure meets this need head on. It is the direct result of our close collaboration with the globe’s leading power electronics device manufacturers, and aims to help give them what they need to quickly achieve their evolving design goals at an optimal price point.”
Each successive Prime Grade wafer tier under the new product grading structure offers tighter tolerances for defect density and other critical performance properties that allow customers to precisely balance wafer quality and price, depending on the demands of their specific device applications. While many SiC substrate manufacturers promise low micropipe densities, Dow Corning says it is the first to specify low tolerances of other killer defects, such as TSD and BPD. Such defects reduce device yields, and inhibit the cost-efficient manufacture of large-area, next-generation power electronic devices with higher current ratings.
All 100mm Prime Grade SiC wafers from Dow Corning offer consistently excellent mechanical characteristics to ensure compatibility with existing and developing device fabrication processes.
“The precise tolerances defining each grade’s crystal quality coupled with our highly competitive pricing structure reflect the company’s deep familiarity with the competitive demands of the silicon semiconductors market,” said Tang Yong Ang, vice president, Compound Semiconductor Solutions, Dow Corning. “With the launch of this new wafer grading structure, we aim to provide SiC substrates that offer silicon-like quality and enable customers worldwide to compete and succeed in the fast-growing power electronics industry.”